
PhoenixBIOS ISA/EISA & 4.0 Beep Codes



Phoenix ISA/EISA BIOS
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BEEP CODE      TEST-DESCRIPTION

    1-1-3      CMOS write/read test in progress or failure
    1-1-4      BIOS ROM checksum in progress or failure

    1-2-1      Programmable Interval Timer test in progress or failure
    1-2-2      DMA initialization in progress or failure
    1-2-3      DMA page register write/read test in progress or fail

    1-3-1      RAM refresh verification in progress or failure
    1-3-3      1st 64K RAM chip or data line failure - multi-bit
    1-3-4      1st 64K RAM odd/even logic failure

    1-4-1      1st 64K RAM address line failure
    1-4-2      1st 64K RAM parity test in progress or failure

    2-1-1      1st 64K RAM chip or data line failure - bit 0
    2-1-2      1st 64K RAM chip or data line failure - bit 1
    2-1-3      1st 64K RAM chip or data line failure - bit 2
    2-1-4      1st 64K RAM chip or data line failure - bit 3

    2-2-1      1st 64K RAM chip or data line failure - bit 4
    2-2-2      1st 64K RAM chip or data line failure - bit 5
    2-2-3      1st 64K RAM chip or data line failure - bit 6
    2-2-4      1st 64K RAM chip or data line failure - bit 7

    2-3-1      1st 64K RAM chip or data line failure - bit 8
    2-3-2      1st 64K RAM chip or data line failure - bit 9
    2-3-3      1st 64K RAM chip or data line failure - bit A
    2-3-4      1st 64K RAM chip or data line failure - bit B

    2-4-1      1st 64K RAM chip or data line failure - bit C
    2-4-2      1st 64K RAM chip or data line failure - bit D
    2-4-3      1st 64K RAM chip or data line failure - bit E
    2-4-4      1st 64K RAM chip or data line failure - bit F

    3-1-1      Master DMA register test in progress or failure
    3-1-2      Slave DMA register test in progress or failure
    3-1-3      Master interrupt mask register test in progress or fail
    3-1-4      Slave interrupt mask register test in progress or fail

    3-2-4      Keyboard controller test in progress or failure

    3-3-4      Screen memory test in progress or failure

    3-4-1      Screen initialization in progress or failure
    3-4-2      Screen retrace tests in progress or failure

    4-2-1      Timer tick interrupt test in progress or failure
    4-2-2      Shutdown test in progress or failure
    4-2-3      Gate A20 failure
    4-2-4      Unexpected interrupt in protected mode

    4-3-1      RAM test in progress or failure above address 0FFFFh
    4-3-3      Interval timer channel 2 test in progress or failure
    4-3-4      Time-Of-Day clock test in progress or failure

    4-4-1      Serial port test test in progress or failure
    4-4-2      Parallel port test test in progress or failure
    4-4-3      Math Coprocessor test in progress or failure



PhoenixBIOS 4.0
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  BEEP CODE      TEST-DESCRIPTION

    1-1-1-3      Verify Real Mode
    1-1-2-1      Get CPU type
    1-1-2-3      Initialize system hardware
    1-1-3-1      Initialize chipset registers with initial POST values
    1-1-3-2      Set in POST flag
    1-1-3-3      Initialize CPU registers
    1-1-4-1      Initialize cache to initial POST values
    1-1-4-3      Initialize I/O

    1-2-1-1      Initialize Power Management
    1-2-1-2      Load alternate registers with initial POST values
    1-2-1-3      Jump to UserPatch0
    1-2-2-1      Initialize keyboard controller
    1-2-2-3      BIOS ROM checksum
    1-2-3-1      8254 timer initialization
    1-2-3-3      8237 DMA controller initialization
    1-2-4-1      Reset Programmable Interrupt Controller

    1-3-1-1      Test DRAM refresh
    1-3-1-3      Test 8742 Keyboard Conroller
    1-3-2-1      Set ES segment to register to 4 GB
    1-3-3-1      Autosize DRAM
    1-3-3-3      Clear 512K base RAM
    1-3-4-1      Test 512 base address lines
    1-3-4-3      Test 512K base memory

    1-4-1-3      Test CPU bus-clock frequency
    1-4-2-4      Reinitialize the chipset
    1-4-3-1      Shadow system BIOS ROM
    1-4-3-2      Reinitialize the cache
    1-4-3-3      Autosize cache
    1-4-4-1      Configure advanced chipset registers
    1-4-4-2      Load alternate registers with CMOS values

    2-1-1-1      Set Initial CPU speed
    2-1-1-3      Initialize interrupt vectors
    2-1-2-1      Intialize BIOS interrrupts
    2-1-2-3      Check ROM copyright notice
    2-1-2-4      Initialize manager for PCI Options ROMs
    2-1-3-1      Check video configuration against CMOS
    2-1-3-2      Initialize PCI bus and devices
    2-1-3-3      Initialize all video adapters in system
    2-1-4-1      Shadow video BIOS ROM
    2-1-4-3      Display copyright notice

    2-2-1-1      Display CPU type and speed
    2-2-1-3      Test keyboard
    2-2-2-1      Set key click if enabled
    2-2-2-3      Enable keyboard
    2-2-3-1      Test for unexpected interrupts
    2-2-3-3      Display prompt "Press F2 to enter SETUP"
    2-2-4-1      Test RAM between 512 and 640k

    2-3-1-1      Test expanded memory
    2-3-1-3      Test extended memory address lines
    2-3-2-1      Jump to UserPatch1
    2-3-2-3      Configure advanced cache registers
    2-3-3-1      Enable external and CPU caches
    2-3-3-3      Display external cache size
    2-3-4-1      Display shadow message
    2-3-4-3      Display non-disposable segments

    2-4-1-1      Display error messages
    2-4-1-3      Check for configuration errors
    2-4-2-1      Test real-time clock
    2-4-2-3      Check for keyboard errors
    2-4-4-1      Set up hardware interrupts vectors
    2-4-4-3      Test coprocessor if present

    3-1-1-1      Disable onboard I/O ports
    3-1-1-3      Detect and install external RS232 ports
    3-1-2-1      Detect and install external parallel ports
    3-1-2-3      Re-initialize onboard I/O ports
    3-1-3-1      Initialize BIOS Data Area
    3-1-3-3      Initialize Extended BIOS Data Area
    3-1-4-1      Initialize floppy controller

    3-2-1-1      Initialize hard-disk controller
    3-2-1-2      Initialize local-bus hard-disk controller
    3-2-1-3      Jump to UserPatch2
    3-2-2-1      Disable A20 adress line
    3-2-2-3      Clear huge ES segment  register
    3-2-3-1      Search for option ROMs
    3-2-3-3      Shadow option ROMs
    3-2-4-1      Set up Power Management
    3-2-4-3      Enable hardware interrupts

    3-3-1-1      Set time of day
    3-3-1-3      Check key lock
    3-3-3-1      Erase F2 prompt
    3-3-3-3      Scan for F2 key stroke
    3-3-4-1      Enter SETUP
    3-3-4-3      Clear in-POST flag

    3-4-1-1      Check for errors
    3-4-1-3      POST done--prepare to boot operating  system
    3-4-2-1      One beep
    3-4-2-3      Check password (optional)
    3-4-3-1      Clear global descriptor table
    3-4-4-1      Clear parity checkers
    3-4-4-3      Clear screen (optional)
    3-4-4-4      Check virus and backup reminders

    4-1-1-1      Try to boot with INT 19

    4-2-1-1      Interrupt handler error
    4-2-1-3      Unknown interrupt error
    4-2-2-1      Pending interrupt error
    4-2-2-3      Initialize option ROM error
    4-2-3-1      Shutdown error
    4-2-3-3      Extended Block Move
    4-2-4-1      Shutdown I/0 error

    4-3-1-3      Initialize the chipset
    4-3-1-4      Initialize refresh counter
    4-3-2-1      Check for Forced Flash
    4-3-2-2      Check HW status of ROM
    4-3-2-3      BIOS ROM is OK
    4-3-2-4      Do a complete RAM test
    4-3-3-1      Do OEM initialization
    4-3-3-2      Initialize interrupt controller
    4-3-3-3      Read in bootstrap code
    4-3-3-4      Initialize all vectors
    4-3-4-1      Boot the Flash program
    4-3-4-2      Initialize the boot device
    4-3-4-3      Boot code was read OK



