Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:13.1 (WebPack) - O.40d Target Family: Spartan3A and Spartan3AN
OS Platform: NT64 Target Device: xc3s50a
Project ID (random number) 458aafca6a694c07afdd1d8c3e594796.3BAEA88D779D49C282807B482362B3EE.18 Target Package: vq100
Registration ID 174235926_0_0_051 Target Speed: -4
Date Generated 2011-11-14T14:33:10 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name AMD Phenom(tm) 8750 Triple-Core Processor CPU Speed 2400 MHz
CPU Name AMD Phenom(tm) 8750 Triple-Core Processor CPU Speed 2400 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Comparators=2
  • 4-bit comparator equal=1
  • 4-bit comparator not equal=1
Multiplexers=1
  • 32-bit 4-to-1 multiplexer=1
Registers=312
  • Flip-Flops=312
MiscellaneousStatistics
  • AGG_BONDED_IO=23
  • AGG_IO=23
  • AGG_SLICE=132
  • NUM_4_INPUT_LUT=62
  • NUM_BONDED_IBUF=5
  • NUM_BONDED_IOB=18
  • NUM_BUFGMUX=4
  • NUM_SLICEL=132
  • NUM_SLICE_FF=167
NetStatistics
  • NumNets_Active=259
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=110
  • NumNodesOfType_Active_CNTRLPIN=105
  • NumNodesOfType_Active_DOUBLE=444
  • NumNodesOfType_Active_DUMMY=154
  • NumNodesOfType_Active_DUMMYESC=21
  • NumNodesOfType_Active_GLOBAL=55
  • NumNodesOfType_Active_HFULLHEX=5
  • NumNodesOfType_Active_HUNIHEX=23
  • NumNodesOfType_Active_INPUT=328
  • NumNodesOfType_Active_IOBOUTPUT=21
  • NumNodesOfType_Active_OMUX=231
  • NumNodesOfType_Active_OUTPUT=215
  • NumNodesOfType_Active_PREBXBY=224
  • NumNodesOfType_Active_VFULLHEX=17
  • NumNodesOfType_Active_VLONG=2
  • NumNodesOfType_Active_VUNIHEX=21
  • NumNodesOfType_Gnd_INPUT=1
  • NumNodesOfType_Gnd_OMUX=1
  • NumNodesOfType_Gnd_OUTPUT=1
  • NumNodesOfType_Gnd_PREBXBY=1
  • NumNodesOfType_Vcc_CNTRLPIN=4
  • NumNodesOfType_Vcc_INPUT=16
  • NumNodesOfType_Vcc_PREBXBY=16
  • NumNodesOfType_Vcc_VCCOUT=14
SiteStatistics
  • IBUF-DIFFMTB=2
  • IBUF-DIFFSTB=3
  • IOB-DIFFMLR=3
  • IOB-DIFFMTB=6
  • IOB-DIFFSLR=2
  • IOB-DIFFSTB=7
  • SLICEL-SLICEM=72
SiteSummary
  • BUFGMUX=4
  • BUFGMUX_GCLKMUX=4
  • BUFGMUX_GCLK_BUFFER=4
  • IBUF=5
  • IBUF_DELAY_ADJ_BBOX=5
  • IBUF_INBUF=5
  • IBUF_PAD=5
  • IOB=18
  • IOB_DELAY_ADJ_BBOX=16
  • IOB_INBUF=16
  • IOB_OUTBUF=18
  • IOB_PAD=18
  • SLICEL=132
  • SLICEL_F=30
  • SLICEL_FFX=83
  • SLICEL_FFY=84
  • SLICEL_G=32
 
Configuration Data
BUFGMUX
  • S=[S_INV:4] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:4]
  • S=[S_INV:4] [S:0]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:5]
  • IBUF_DELAY_VALUE=[DLY0:5]
  • IFD_DELAY_VALUE=[DLY0:5]
  • SEL_IN=[SEL_IN:5] [SEL_IN_INV:0]
IBUF_PAD
  • IOATTRBOX=[LVCMOS33:5]
IOB
  • O1=[O1_INV:0] [O1:18]
  • T1=[T1_INV:0] [T1:17]
IOB_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:16]
  • IBUF_DELAY_VALUE=[DLY0:16]
  • IFD_DELAY_VALUE=[DLY0:16]
  • SEL_IN=[SEL_IN:16] [SEL_IN_INV:0]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:18]
  • SUSPEND=[3STATE:18]
  • TRI=[TRI_INV:0] [TRI:17]
IOB_PAD
  • DRIVEATTRBOX=[12:18]
  • IOATTRBOX=[LVCMOS33:18]
  • SLEW=[SLOW:18]
SLICEL
  • BX=[BX_INV:1] [BX:74]
  • BY=[BY:100] [BY_INV:0]
  • CE=[CE:26] [CE_INV:12]
  • CLK=[CLK:110] [CLK_INV:0]
  • SR=[SR:50] [SR_INV:0]
SLICEL_FFX
  • CE=[CE:25] [CE_INV:12]
  • CK=[CK:83] [CK_INV:0]
  • D=[D:82] [D_INV:1]
  • FFX_INIT_ATTR=[INIT0:83]
  • FFX_SR_ATTR=[SRLOW:83]
  • LATCH_OR_FF=[FF:83]
  • REV=[REV_INV:0] [REV:26]
  • SR=[SR:26] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:83]
SLICEL_FFY
  • CE=[CE:26] [CE_INV:12]
  • CK=[CK:84] [CK_INV:0]
  • D=[D:84] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:84]
  • FFY_SR_ATTR=[SRLOW:84]
  • LATCH_OR_FF=[FF:84]
  • SR=[SR:24] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:66] [SYNC:18]
 
Pin Data
BUFGMUX
  • I0=4
  • O=4
  • S=4
BUFGMUX_GCLKMUX
  • I0=4
  • OUT=4
  • S=4
BUFGMUX_GCLK_BUFFER
  • IN=4
  • OUT=4
IBUF
  • I=5
  • PAD=5
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=5
  • SEL_IN=5
IBUF_INBUF
  • IN=5
  • OUT=5
IBUF_PAD
  • PAD=5
IOB
  • I=16
  • O1=18
  • PAD=18
  • T1=17
IOB_DELAY_ADJ_BBOX
  • IBUF_OUT=16
  • SEL_IN=16
IOB_INBUF
  • IN=16
  • OUT=16
IOB_OUTBUF
  • IN=18
  • OUT=18
  • TRI=17
IOB_PAD
  • PAD=18
SLICEL
  • BX=75
  • BY=100
  • CE=38
  • CLK=110
  • F1=30
  • F2=30
  • F3=10
  • F4=2
  • G1=32
  • G2=32
  • G3=11
  • G4=1
  • SR=50
  • X=22
  • XQ=83
  • Y=22
  • YQ=84
SLICEL_F
  • A1=30
  • A2=30
  • A3=10
  • A4=2
  • D=30
SLICEL_FFX
  • CE=37
  • CK=83
  • D=83
  • Q=83
  • REV=26
  • SR=26
SLICEL_FFY
  • CE=38
  • CK=84
  • D=84
  • Q=84
  • SR=24
SLICEL_G
  • A1=32
  • A2=32
  • A3=11
  • A4=1
  • D=32
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
_impact 10 9 0 0 0 0 0
bitgen 58 58 0 0 0 0 0
edif2ngd 8 8 0 0 0 0 0
map 69 65 0 0 0 0 0
netgen 8 8 0 0 0 0 0
ngcbuild 11 11 0 0 0 0 0
ngdbuild 75 75 0 0 0 0 0
obngc 8 8 0 0 0 0 0
par 65 60 2 0 0 0 0
trce 60 60 0 0 0 0 0
xst 248 248 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ise_c_using_xst_for_synthesis.htm ( 1 ) /doc/usenglish/isehelp/sse_c_attr_traits.htm ( 1 )
/doc/usenglish/isehelp/sse_c_considerations.htm ( 1 ) /doc/usenglish/isehelp/sse_c_files.htm ( 1 )
/doc/usenglish/isehelp/sse_c_intro_to_attrs.htm ( 2 ) /doc/usenglish/isehelp/sse_c_iomarkers.htm ( 1 )
/doc/usenglish/isehelp/sse_c_nets.htm ( 1 ) /doc/usenglish/isehelp/sse_c_overview.htm ( 2 )
/doc/usenglish/isehelp/sse_c_symbols.htm ( 2 ) /doc/usenglish/isehelp/sse_p_adding_attr.htm ( 1 )
/doc/usenglish/isehelp/sse_p_displaying_attr_sch_net.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_OverwriteSym=true
PROP_ProjectDescription=for UNIC XC3S50A PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=Schematic PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2011-06-18T17:47:43
PROP_intWbtProjectID=3BAEA88D779D49C282807B482362B3EE PROP_intWbtProjectIteration=18
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_AutoTop=true PROP_DevFamily=Spartan3A and Spartan3AN
PROP_DevDevice=xc3s50a PROP_DevFamilyPMName=spartan3a
PROP_DevPackage=vq100 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 PROP_PreferredLanguage=VHDL
FILE_SCHEMATIC=1 FILE_UCF=1
FILE_VHDL=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=17 NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=42
NGDBUILD_NUM_FDCP=32 NGDBUILD_NUM_FDE=75 NGDBUILD_NUM_FDR=18 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=3 NGDBUILD_NUM_IOBUF=16
NGDBUILD_NUM_LUT2=41 NGDBUILD_NUM_LUT3=18 NGDBUILD_NUM_LUT4=3 NGDBUILD_NUM_OBUF=1
NGDBUILD_NUM_OBUFT=1 NGDBUILD_NUM_VCC=1
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=17 NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_FD=42 NGDBUILD_NUM_FDCP=32
NGDBUILD_NUM_FDE=75 NGDBUILD_NUM_FDR=18 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=19
NGDBUILD_NUM_IBUFG=2 NGDBUILD_NUM_INV=3 NGDBUILD_NUM_LUT2=41 NGDBUILD_NUM_LUT3=18
NGDBUILD_NUM_LUT4=3 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_OBUFT=17 NGDBUILD_NUM_VCC=1