| main Project Status (06/21/2011 - 14:52:48) | |||
| Project File: | pwm.xise | Parser Errors: | No Errors |
| Module Name: | SPI_inout | Implementation State: | Programming File Not Generated |
| Target Device: | xc3s50a-4vq100 |
|
|
| Product Version: | ISE 13.1 |
|
|
| Design Goal: | Balanced |
|
|
| Design Strategy: | Xilinx Default (unlocked) |
|
|
| Environment: |
|
||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | ||||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| CPLD Fitter Report (Text) | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Report | Out of Date | Di 21. Jun 14:52:36 2011 | |
| WebTalk Log File | Out of Date | Di 21. Jun 14:52:48 2011 | |